Please use this identifier to cite or link to this item: http://theses.iitj.ac.in:8080/jspui/handle/123456789/32
Title: JunctionLess Nanowire Transistor and its integration with NMOS Inverter circuit
Researcher : Joshi, Naman
Supervisor: Dixit, Ambesh
Tiwari, Shree Prakash
Department: Center for Information Communication and Technology
Issue Date: May-2013
Citation: Joshi, Naman. (2013). JunctionLess Nanowire Transistor and its integration with NMOS Inverter circuit (Master's thesis). Indian Institute of Technology Jodhpur, Jodhpur.
Abstract: Junction Nanowire Transistor (JNT) has emerged as one of the most promising solution of different problems occur in short channel MOS Field Effect Transistors. The proposed device consists of a narrow Pi-Gate and a thin uniformly doped channel which can fully be depleted and hence turned off by the work-function difference between Gate and Channel. As the device does not possess any PN junction, it not only offers much simpler fabrication process even in nanometre regime but also the possibility of further miniaturisation of semiconductor devices. In this project, the concerned device has been investigated in terms of its physical dimensions and hence optimised for better electrical characteristics as an Inverter by the use of simulation software.
Pagination: xi, 33p.
URI: http://theses.iitj.ac.in:8080/jspui/handle/123456789/32
Accession No.: TM00027
Appears in Collections:M. Tech. Theses

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