Please use this identifier to cite or link to this item: http://theses.iitj.ac.in:8080/jspui/handle/123456789/72
Title: Improvement in Tunnel Field Effect Transistor(TFET) Structure and a Low Power Circuit Implementation Strategy
Researcher : Tyagi, Astha
Supervisor: Tiwari, Shree Prakash
Department: Electrical Engineering
Issue Date: May-2015
Citation: Tyagi, Astha. (2015). Improvement in Tunnel Field Effect Transistor(TFET) Structure and a Low Power Circuit Implementation Strategy (Master's thesis). Indian Institute of Technology Jodhpur, Jodhpur.
Abstract: This work focuses on improvement in Tunnel Field Effect Transistor (TFET) structure and low power circuit implementation strategies. Firstly, a new device structure named Wedge TFET (WTFET) is proposed for improving ON current (ION) and current ON/OFF ratio (ION/IOFF) in TFET. This proposed device is a double gate structure, showing ~3 times higher ON current compared to planar double gate TFET device working at supply voltage of 0.6 to 1.0 V. This increase is mainly due to increase in the tunneling area. In addition to increased current, WTFET also shows high ION/IOFF ratio of the order ~1012. The subthreshold swing values are slightly higher for WTFET compared to our simulated DGTFET, however, both of them fall in the range of 40 to 50 mV/dec. The WTFET device with higher ION and ION/IOFF ratio and with almost same area requirement can be a potential candidate for future low voltage applications. Implementation of circuits with low power devices is essential for realization of low power electronic systems and blocks. Memory block, especially of static random access memory (SRAM) is one of the important areas that need optimization. Modification using Schmitt Trigger mechanism is one of the crucial means for SRAM optimization. In order to overcome drawbacks of TFET devices in the SRAM circuitry and short channel effects posed by conventional devices in Schmitt Trigger based SRAM cells, circuit modifications using Schmitt Trigger feedback mechanism in TFET based SRAM cells have been looked upon. The scope of proposed WTFET device for the same has been studied. As a part of this thesis work, Schmitt Trigger inverter characteristics have been understood and compared with that of simple inverter. For this, a new modified circuit named Dynamic Feedback Schmitt Trigger (DFST) has been proposed to overcome several drawbacks of Schmitt Trigger circuit. The regenerative effect of DFST observed in multistage circuit restricts its use in SRAM circuitry. Schmitt Trigger mechanism when incorporated in SRAMs with TFET devices provide better read stability along with elimination of short channel effects observed. Since proposed device structure overcomes the drawbacks of TFETs, hence use of WTFET structure along with Schmitt Trigger mechanism in SRAMs may improve the performance of the memory.
Pagination: vii, 30p.
URI: http://theses.iitj.ac.in:8080/jspui/handle/123456789/72
Accession No.: TM00067
Appears in Collections:M. Tech. Theses

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